/* Generated automatically by the program `genattr-common'
   from the machine description file `md'.  */

#ifndef GCC_INSN_ATTR_COMMON_H
#define GCC_INSN_ATTR_COMMON_H

enum attr_cpu {CPU_V7, CPU_CYPRESS, CPU_V8, CPU_SUPERSPARC, CPU_HYPERSPARC, CPU_LEON, CPU_LEON3, CPU_LEON5, CPU_LEON3V7, CPU_SPARCLITE, CPU_F930, CPU_F934, CPU_SPARCLITE86X, CPU_SPARCLET, CPU_TSC701, CPU_V9, CPU_ULTRASPARC, CPU_ULTRASPARC3, CPU_NIAGARA, CPU_NIAGARA2, CPU_NIAGARA3, CPU_NIAGARA4, CPU_NIAGARA7, CPU_M8};
enum attr_isa {ISA_V7, ISA_V8, ISA_V9, ISA_SPARCLET};
enum attr_cpu_feature {CPU_FEATURE_NONE, CPU_FEATURE_FPU, CPU_FEATURE_FPUNOTV9, CPU_FEATURE_V9, CPU_FEATURE_VIS, CPU_FEATURE_VIS3, CPU_FEATURE_VIS4, CPU_FEATURE_VIS4B};
enum attr_type {TYPE_IALU, TYPE_COMPARE, TYPE_SHIFT, TYPE_LOAD, TYPE_SLOAD, TYPE_STORE, TYPE_UNCOND_BRANCH, TYPE_BRANCH, TYPE_CALL, TYPE_SIBCALL, TYPE_CALL_NO_DELAY_SLOT, TYPE_RETURN, TYPE_CBCOND, TYPE_UNCOND_CBCOND, TYPE_IMUL, TYPE_IDIV, TYPE_FPLOAD, TYPE_FPSTORE, TYPE_FP, TYPE_FPMOVE, TYPE_FPCMOVE, TYPE_FPCRMOVE, TYPE_FPCMP, TYPE_FPMUL, TYPE_FPDIVS, TYPE_FPDIVD, TYPE_FPSQRTS, TYPE_FPSQRTD, TYPE_FGA, TYPE_VISL, TYPE_VISMV, TYPE_VISCMP, TYPE_FGM_PACK, TYPE_FGM_MUL, TYPE_PDIST, TYPE_PDISTN, TYPE_EDGE, TYPE_EDGEN, TYPE_GSR, TYPE_ARRAY, TYPE_BMASK, TYPE_CMOVE, TYPE_IALUX, TYPE_MULTI, TYPE_SAVEW, TYPE_FLUSHW, TYPE_IFLUSH, TYPE_TRAP, TYPE_LZD};
enum attr_subtype {SUBTYPE_SINGLE, SUBTYPE_DOUBLE, SUBTYPE_MOVSTOUW, SUBTYPE_MOVXTOD, SUBTYPE_MOVDTOX, SUBTYPE_ADDSUB64, SUBTYPE_CMASK, SUBTYPE_FPU, SUBTYPE_MAXMIN, SUBTYPE_OTHER, SUBTYPE_REG, SUBTYPE_ALIGNADDR, SUBTYPE_PREFETCH, SUBTYPE_REGULAR};
enum attr_empty_delay_slot {EMPTY_DELAY_SLOT_FALSE, EMPTY_DELAY_SLOT_TRUE};
enum attr_emit_cbcond_nop {EMIT_CBCOND_NOP_FALSE, EMIT_CBCOND_NOP_TRUE};
enum attr_branch_type {BRANCH_TYPE_NONE, BRANCH_TYPE_ICC, BRANCH_TYPE_FCC, BRANCH_TYPE_REG};
enum attr_pic {PIC_FALSE, PIC_TRUE};
enum attr_calls_alloca {CALLS_ALLOCA_FALSE, CALLS_ALLOCA_TRUE};
enum attr_calls_eh_return {CALLS_EH_RETURN_FALSE, CALLS_EH_RETURN_TRUE};
enum attr_leaf_function {LEAF_FUNCTION_FALSE, LEAF_FUNCTION_TRUE};
enum attr_delayed_branch {DELAYED_BRANCH_FALSE, DELAYED_BRANCH_TRUE};
enum attr_flat {FLAT_FALSE, FLAT_TRUE};
enum attr_fix_ut699 {FIX_UT699_FALSE, FIX_UT699_TRUE};
enum attr_fix_b2bst {FIX_B2BST_FALSE, FIX_B2BST_TRUE};
enum attr_fix_lost_divsqrt {FIX_LOST_DIVSQRT_FALSE, FIX_LOST_DIVSQRT_TRUE};
enum attr_fix_gr712rc {FIX_GR712RC_FALSE, FIX_GR712RC_TRUE};
enum attr_fptype {FPTYPE_SINGLE, FPTYPE_DOUBLE};
enum attr_fptype_ut699 {FPTYPE_UT699_NONE, FPTYPE_UT699_SINGLE};
enum attr_us3load_type {US3LOAD_TYPE_2CYCLE, US3LOAD_TYPE_3CYCLE};
enum attr_tls_delay_slot {TLS_DELAY_SLOT_FALSE, TLS_DELAY_SLOT_TRUE};
enum attr_in_sibcall_delay {IN_SIBCALL_DELAY_FALSE, IN_SIBCALL_DELAY_TRUE};
enum attr_in_return_delay {IN_RETURN_DELAY_FALSE, IN_RETURN_DELAY_TRUE};
enum attr_in_branch_delay {IN_BRANCH_DELAY_FALSE, IN_BRANCH_DELAY_TRUE};
enum attr_in_integer_branch_annul_delay {IN_INTEGER_BRANCH_ANNUL_DELAY_FALSE, IN_INTEGER_BRANCH_ANNUL_DELAY_TRUE};
#define INSN_SCHEDULING
#define DELAY_SLOTS 1

#endif /* GCC_INSN_ATTR_COMMON_H */
